Agilent Video Central

	Videos found: 48
	Discovering SystemVue - Wiring and Buses This product tutorial demonstrates advanced connectivity features, such as multi-input buses, that are helpful for modeling complex baseband PHYs in the W1461 SystemVue Communications Architect software. Rating: Views: 862
	The Basics of Signal Processing in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial demonstrates signal processing in ADS. Rating: Views: 1678
	Discovering SystemVue - Digital Filter Design This product tutorial shows how to design FIR and IIR filters using the digital filter tool inside the W1461 SystemVue Communications Architect software Rating: Views: 1629
	Discovering SystemVue - Fixed-Point FIR Design This product tutorial shows how to design finite-precision digital filters using the W1903 Fixed-Point Library option to the W1461 SystemVue Communications Architect software Rating: Views: 1090
	The Basics of Advanced Design System (Agilent EEsof EDA - 9) This video provides an introduction in the use of Advanced Design System. Rating: Views: 5263
	Discovering SystemVue - Math Language Models This product tutorial shows how to do in-line algorithmic modeling in ".m-code" format for baseband PHYs, using the math language block in the W1461 SystemVue Communications Architect software. Rating: Views: 1028
	Using SystemVue to design a FPGA-based SDR WiMAX IQ Modulator (4 of 4) Demonstration of design & verification of an FPGA-based mobile WiMAX IQ Modulator for a software-defined radio. Flow shows a design example in the W1462 SystemVue FPGA Architect, from algorithm to fixed-point to VHDL to Xilinx ISE synthesized .bit file to Nallatech board to Agilent VSA/Infiniium verification. In Part 4 of 4, the FPGA is synthesized & verified using "rapid proptotyping" techniques. Rating: Views: 1178
	Genesys Flow Part 1 - WhatIF Frequency Planner This is the first in a multi-part series demonstrating the Genesys RF Board Flow. WhatIF is an easy to use synthesis tool that identifies mixer spurs and can identify Spur Free IF's in minutes.(Search "Genesys" to view other videos in this series)Note: Videos may not play properly inside company firewalls. Rating: Views: 2643
	Genesys Flow Part 2 - Spectrasys RF System Architecture This part 2 in the Genesys RF Board Flow series. This part demonstrates how Spectrasys RF system architecture simulation tool fits into the flow and integrates with the other Genesys tools.(Search "Genesys" to view the other parts in the series)Note: Videos may not play properly inside company firewalls. Rating: Views: 2139
	Genesys S/Filter Advanced Direct Filter Synthesis S/Filter is actually three filter synthesis tools: Filter for lumped LC Filters, M/Filter for distributed filters and S/Filter for both LC and distributed. The difference is Filter and M/Filter are limited to standard shapes such as Butterworth and Cheby, whereas S/Filter allows the designer freedom to design custom filter shapes. Designers can customize a response by placing transmission zeros where desired. This video covers just the S/Filter module.(Search "Genesys" for more videos in this series) Note: Videos may not play properly inside company firewalls. Rating: Views: 2236
	EMPro Overview EMPro is a 3D modeling environment that allows you to create 3D structures or import them from other CAD tools, then simulate with two different 3D EM simulators: Finite Element Method (FEM) and Finite Difference Time Domain (FDTD). EMPro is part of the ADS design flow. You can place fully parameterized 3D EM components from EMPro onto and ADS layout and run full 3D EM simulations directly from ADS, to analyze interactions between the 2D layout and 3D components, packages, connectors, etc. Rating: Views: 443
	Load Pull Analysis in Advanced Design System (Agilent EEsof EDA) This video shows how to perform a 1-tone load pull analysis for your device by modifying a built-in example. It also shows where to get more information and details about load-pull in ADS. Rating: Views: 5200
	Building Schematic Designs in ADS (Agilent EEsof EDA - 9) This video tutorial demonstrates creating schematics in ADS. Rating: Views: 3398
	FPGA Design & Verification using Agilent SystemVue and LTE libraries This product demonstration discusses FPGA design & verification for an LTE baseband PHY, using the W1461 Agilent SystemVue design software and its associated W1910 and W1912 Baseband Libraries for the 3GPP LTE standard. Rating: Views: 2587
	AC Simulation in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes how to set up and run AC simulations in ADS. Rating: Views: 4515
	Data Display In Advanced Design System - Part 1 (Agilent EEsof EDA - 9) This video tutorial, part 1 of 2 video tutorials, describes using the Data Display facility in ADS. Rating: Views: 2410
	Data Display In Advanced Design System - Part 2 (Agilent EEsof EDA - 9) This video tutorial, Part 2 of 2 video tutorials, describes Data Display in ADS. Rating: Views: 1942
	Circuit Envelope Simulation in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes setting up and running the Circuit Envelope simulator in ADS. Rating: Views: 5184
	DC Simulation in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes setting up and running DC simulations in ADS. Rating: Views: 1843
	Harmonic Balance Simulation in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes the set up and running of the harmonic balance simulator. Rating: Views: 3216
	ADS Momentum (Agilent EEsof EDA - 9) This video tutorial illustrates the use of Momentum, Agilent's 3-D planar electromagnetic simulator. Rating: Views: 6771
	S-Parameter Simulation in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes setting up and running S-parameter simulations in ADS. Rating: Views: 4580
	Tuning in Advanced Design System (Agilent EEsof EDA - 9) This video tutorial describes using the tuning feature in ADS. Rating: Views: 3564
	Using SystemVue to design a FPGA-based SDR WiMAX IQ Modulator (1 of 4) Demonstration of the design & verification of an FPGA-based mobile WiMAX IQ Modulator for a software-defined radio. Flow shows a design example in the W1462 SystemVue FPGA Architect, from algorithm to fixed-point to VHDL to Xilinx ISE synthesized .bit file to Nallatech board to Agilent VSA/Infiniium verification. In Part 1 of 4, the Fixed Point design is introduced. Rating: Views: 1364
	Genesys Getting Started Part 1 An introduction to the Genesys 2008 GUI and basics of the Genesys Core. See the "What's New in Genesys2009" video for changes to the Genesys parts and graphs dialog boxes.(Search "Genesys" to view other videos in this series)Note: Videos may not play properly inside company firewalls. Rating: Views: 3696

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